FPGA Implementation of Fog Removal using Anisotropic Diffusion
Hardware-optimized fog removal algorithm for real-time video processing
Project Supervisor: Professor Sudipta Mukhopadhyay (IIT Kharagpur)
Implemented and optimized a fog-removal algorithm on a Xilinx Zedboard FPGA, achieving 200 fps processing speed for real-time video dehazing. The project involved designing the algorithm in synthesizable hardware description language and integrating system-level blocks.
Technical Accomplishments:
- Framework: Vivado HLS, Vivado IP Integrator
- Target: Xilinx Zedboard FPGA
- Algorithm: Anisotropic diffusion-based fog removal
- Performance: 200 fps in hardware simulations
- Process: Vivado HLS design → RTL synthesis → system-level integration
This implementation demonstrates the feasibility of real-time video enhancement on embedded hardware platforms, critical for mobile and autonomous systems applications.